Field of the Invention
Generally, the present disclosure relates to the manufacture and use of sophisticated semiconductor devices, and, more specifically, to various methods, structures, and systems for increasing the junction electric field of high current diodes.
Description of the Related Art
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed on a group of semiconductor wafers, sometimes referred to as a lot, using semiconductor-manufacturing tools, such as exposure tool or a stepper. As an example, an etch process may be performed on the semiconductor wafers to shape objects on the semiconductor wafer, such as polysilicon lines, each of which may function as a gate electrode for a transistor. As another example, a plurality of metal lines, e.g., aluminum or copper, may be formed that serve as conductive lines that connect one conductive region on the semiconductor wafer to another. In this manner, integrated circuit chips may be fabricated.
Integrated circuits comprising diodes are known, wherein the diode is formed of a P channel doped region (i.e., a region comprising a P-type dopant, i.e., a source of holes) adjacent to an N channel doped region (i.e., a region comprising an N-type dopant, i.e., a source of electrons). The region of adjacency between P channel doped region and N channel doped region may be referred to as a “junction” or a “depletion region.” As is generally understood by the person of ordinary skill in the art, an electric field across a junction arises from the diffusion of electrons from the N channel doped region to the P channel doped region and the diffusion of holes in the opposite direction. An increase in the junction electric field can directly contribute to higher diode forward junction current, and thus, higher performance of the diode and integrated circuits comprising the diode.
It is known to increase the electric field across the junction by increasing the concentrations of P-type dopants and N-type dopants in the corresponding channel regions of the diode. However, at high junction electric fields, carrier mobility suffers from ionized impurity scattering. Ionized impurity scattering increases with increasing total dopant concentration (up to about 1019 cm−3) due to the screening effect. It should be borne in mind that carrier mobility is proportional to the average time between scattering events, not the minority-carrier recombination lifetime.
Therefore, it would be desirable to increase diode junction electric fields without increasing total dopant concentrations in both N channel doped regions and P channel doped regions to greater than about 1019 cm−3.
The present disclosure may address and/or at least reduce one or more of the problems identified above regarding the prior art and/or provide one or more of the desirable features listed above.